(1) Field of the Invention
The invention relates to a method of polysilicon etching in the fabrication of integrated circuits, and more particularly, to a method of preventing polysilicon residues in the polysilicon etching process in the manufacture of integrated circuits.
(2) Description of the Prior Art
In the manufacture of integrated circuit devices, it is necessary to maintain an ultra clean wafer surface in order to obtain high quality devices. NH.sub.4 OH--H.sub.2 O.sub.2 (APM), HCl--H.sub.2 O.sub.2 (HPM), and H.sub.2 SO.sub.4 --H.sub.2 O.sub.2 (SPM) are efficient in removing organic or metallic impurities, but these cleaning processes will leave the surface of wafers in a hydrophillic state due to the oxidizing nature of peroxide (H.sub.2 O.sub.2). There are at least two problems associated with this fact. If the surface of the wafer is an undensified tetraethoxysilane (TEOS) film, this film will absorb moisture hydrogen from the ambient or the wet cleaning process. Also, the hydrophillic surface could retain some impurities from the cleaning chemicals. The moisture and impurities will be converted into volatile defects and act as a mask during the subsequent polysilicon etching process.
FIG. 1 illustrates a portion of a partially completed integrated circuit device. Polysilicon layer 16 has been formed over a gate oxide layer 14 on a semiconductor substrate 10. A TEOS oxide layer 20 is formed over the polysilicon layer 16. The TEOS oxide layer is patterned to form a hard mask for etching the polysilicon. After this patterning, the wafer is cleaned using one of the conventional cleaning chemicals listed above. Impurities and moisture droplets 25 form on the surface of the wafer, due to the mechanisms discussed above.
When the polysilicon is etched away where it is not covered by the TEOS oxide hard mask 20, the impurities 25 will also act as a mask. Polysilicon residue 17 will remain in the areas masked by the impurities, as illustrated in FIG. 2. It is desired to find a method to remove the moisture and impurities before the polysilicon etch in order to prevent polysilicon residue.
U.S. Pat. No. 5,610,105 to Vines et al teach a vacuum bake followed by an annealing process in the preparation of a dielectric layer in order to minimize the amount of water, hydrogen, and hydrocarbon present in the dielectric layer. U.S. Pat. No. 5,554,564 to Chu et al shows an in-situ hot bake treatment that prevents precipitate formation after a contact layer etchback step. U.S. Pat. No. 5,635,102 to Mehta teaches selectively removing a porous silicon oxide layer containing absorbed moisture. U.S. Pat. No. 5,030,590 to Amini et al teaches removing polysilicon residues using a dilute hydroxide solution. U.S. Pat. No. 5,228,950 to Webb et al discloses removing polysilicon residues using NF.sub.3 gas in a vacuum chamber. None of these references address the problem of removing impurities and moisture on the wafer surface before the polysilicon etch.